Conventional manufacturing techniques mass produce integrated circuit dies from wafers, typically silicon wafers. Each wafer is processed by subjecting the wafer to a series of processes including material deposition and etching procedures to create several integrated circuit dies on the wafer. The wafer is then partitioned and separated along streets to create individual die, typically through a sawing process. These dies are then bonded to leads, and finally packaged in a ceramic or plastic housing to form the final integrated circuit.
In the case of manufacturing micromechanical devices, as well as other devices such as biological or chemical sensors, it is desired to further process the semiconductor wafer after a "partial saw" process, that is, before the wafer is completely diced or cut to form each of the individual die. The partial-saw process is beneficial to initially and accurately cut the wafer along the streets while the wafer is easily registerable with processing equipment, and before the circuit is complete. However, this partial-saw process undesirably generates particles which can contaminate, damage, and possibly render useless, the individual dies if not carefully controlled. Micromechanical devices generally include miniature devices manufactured upon a substrate and have moving parts. Some examples include microaccelerometers, micromotors and gears. These micromechanical devices are particularly vulnerable to particles, and thus the partial-saw process is useful to achieve a partial cut before the moving parts are defined. Clean-up to remove residual debris and particles after the partial-saw process is critical.
A recent innovation of Texas Instruments Incorporated of Dallas Texas, is the digital micromirror device or the deformable mirror device (collectively DMD). The DMD is an electro/mechanical/optical Spatial light modulator (SLM) suitable for use in displays, projectors and hard copy printers. The DMD is a monolithic single-chip integrated circuit SLM, comprised of a high density array of 16 micron square movable micromirrors on 17 micron centers. These mirrors are fabricated and supported over address circuitry including an array of SRAM cells and address electrodes. Each mirror forms one pixel of the DMD array and is bistable, that is to say, stable in one of two positions, wherein a source of light directed upon the mirror array will be reflected in one of two directions. In one stable "on" mirror position, incident light to that mirror will be reflected to a projector lens and focused on a display screen or a photosensitive element of a printer. In the other "off" mirror position, light directed on the mirror will be deflected to a light absorber. Each mirror of the array is individually controlled to either direct incident light into the projector lens, or to the light absorber. The projector lens ultimately focuses and magnifies the modulated light from the pixel mirror array onto a display screen and produce an image in the case of a display. If each pixel mirror of the DMD array is in the "on" position, the displayed image will be an array of bright pixels.
For a more detailed discussion of the DMD device and uses, cross reference is made to U.S. Pat. No. 5,061,049 to Hornbeck, entitled "Spatial Light Modulator and Method"; U.S. Pat. No. 5,079,544 to DeMond, et al, entitled "Standard Independent Digitized Video System"; and U.S. Pat. No. 5,105,369 to Nelson, entitled "Printing System Exposure Module Alignment Method and Apparatus of Manufacture", each patent being assigned to the same assignee of the present invention and the teachings of each are incorporated herein by reference. Gray scale of the pixels forming the image is achieved by pulse-width modulation techniques of the mirrors, such as that described in U.S. Pat. No. 5,278,652, entitled "DMD Architecture and Timing for Use in a Pulse-Width Modulated Display System", assigned to the same assignee of the present invention, and the teachings of which are incorporated herein by reference.
The individual mirrors of the DMD mirror array are easily susceptible to damage from debris including particles generated during the wafer saw and/or break process. Because the DMD is a micromechanical device with movable pixel mirrors, the DMDs fabricated upon a wafer may not be conveniently covered with a protective oxide coating prior to a final saw process as is conventional with other semiconductor processing techniques. Moreover, due to the conductive address electrodes with are positioned below the conductive mirrors, a conductive particle entrapped between the mirror and address electrode could easily short the mirror to the address electrode. Thus, it is particularly important in the case of the DMD to avoid leaving behind any particles during the wafer saw process and clean process.
As disclosed in commonly assigned U.S. Pat. No. 5,435,876 entitled Grid Array Masking Tape Process, one technique to protect the wafer during sawing is to utilize a grid array masking tape over the active surface of the processed wafer. The tape adheres to the wafer along a grid extending between the formed integrated circuits and prevents debris from damaging the active surface during the sawing process. The tape is removed after the saw process and then the photoresist under the mirror layer is undercut by a plasma etch process to form wells under the mirrors, allowing the mirrors to deflect.
Other techniques for processing a wafer to form micromechanical devices are disclosed in commonly assigned U.S. Pat. No. 5,393,706 entitled "Integrated Partial Sawing Process", U.S. Pat. No. 5,445,559, entitled "Wafer-Like Processing after Sawing DMDs", U.S. Pat. No. 5,435,876 entitled "Grid Array Masking Tape Process", and U.S. Pat. No. 5,389,182, entitled "Use of a Saw Frame with Tape as a Substrate Carrier for Wafer Level Backend Processing". The teaching of each of these commonly assigned patents is incorporated herein by reference.
In commonly assigned U.S. patent application Ser. No. 08/369,838 entitled "Separation of Wafer into Die with Wafer-Level Processing", there is disclosed a method of covering the surface of a wafer with a protective coating, whereby separation lines are then inscribed on the top surface of the wafer. These separation lines represent boundaries between die and have a predetermined depth. After the protective coating is removed, the wafer is further processed with at least one more wafer-level process. Finally, the wafer is separated into die along the separation lines. In this patent application, there is taught a method whereby the protective coating maybe accomplished by first spinning-on a layer of photoresist and then depositing a thin oxide layer. This protective layer is later removed during the cleaning step using solvents, solvent streams, or ashing. In addition, a wet etch process can be used to remove a resist material.
One technical challenge encountered during the processing of the DMD is the fact that the micromechanical mirrors and associated support structure are fabricated upon CMOS addressing circuitry. Thus, when the wafer is partially sawn along the streets to form kerfs, oxide particles from the CMOS layer of the wafer are generated, and may become disposed within the kerfs. These oxide particles can also be scattered about and disposed upon the protective layer, as shown in FIG. 1.
Although there are several techniques available for removing this debris including oxide particles, it has now recently been discovered that even after a cleanup process to remove oxide particles from the wafer surface and kerfs, the edges of the buried CMOS layer adjacent the kerfs will continue to generate oxide particles over time, after a clean-up process. It has now been discovered that the subsequent generation of these oxide particles from the CMOS layer is due to the microscopic damage, including cracks, in the CMOS layer walls adjacent these kerfs. Time, vibration and other factors facilitate the continuous release of these microscopic oxide particles from the CMOS layer adjacent the kerfs.
It is an object of the present invention to provide a method of cleaning a semiconductor wafer after a partial saw process, and before subsequent processing, which also substantially reduces or eliminates the subsequent generation of debris, including oxide particles from the CMOS layer, after the post-saw cleanup process. Such a method of reducing the subsequent generation of oxide particles should realize substantially higher yield of dies, especially those of the micromechanical type including DMD's, but also other integrated circuits and devices that require subsequent processing including chemical or biological sensors.